This relates to solid-state image sensor arrays (e.g., complementary metal-oxide-semiconductor (CMOS) arrays) and, more specifically, to image sensors with pixels that can have submicron sizes and can be illuminated from the back side or the front side of a pixel substrate on which the pixels are formed. The small (i.e., less than 1 micron) size of the pixels reduces the cost of the image sensor arrays, but it is important not to sacrifice sensor performance such as noise, pixel well capacity, dynamic range, blooming control, low dark current contributions, and negligible image lag despite the decreased pixel size.
Typical image sensors sense light by converting impinging photons into electrons (or holes) that are integrated (collected) in sensor pixels. Upon completion of each integration cycle, the collected charge is converted into voltage signals, which are supplied to corresponding output terminals associated with the image sensor. Typically, the charge-to-voltage conversion is performed directly within the pixels, and the resulting analog pixel voltage signals are transferred to the output terminals through various pixel addressing and scanning schemes. The analog voltage signal can sometimes be converted on-chip to a digital equivalent before being conveyed off-chip. Each pixel includes a buffer amplifier (i.e., source follower) that drives output sensing lines that are connected to the pixels via respective address transistors.
After the charge-to-voltage conversion is completed and after the resulting signals are transferred out from the pixels, the pixels are reset before a subsequent integration cycle begins. In pixels that include floating diffusions (FD) serving as the charge detection node, this reset operation is accomplished by momentarily turning on a reset transistor that connects the floating diffusion node to a voltage reference (typically the pixel current drain node) for draining (or removing) any charge transferred onto the FD node. However, removing charge from the floating diffusion node using the reset transistor generates thermal kTC-reset noise, as is well known in the art. This kTC reset noise must be removed using correlated double sampling (CDS) signal processing techniques in order to achieve desired low noise performance. Typical CMOS image sensors that utilize CDS require at least four transistors (4T) per pixel. An example of the 4T pixel circuit with a pinned photodiode can be found in Lee (U.S. Pat. No. 5,625,210), incorporated herein as a reference.
FIG. 1 shows a simplified circuit diagram of a pixel 100 in a CMOS sensor. Pixel circuit 100 has a two-way shared photodiode scheme in which two photodiodes share a single floating diffusion node. In particular, photodiodes 101 (PD1) and 102 (PD2) share common floating diffusion (FD) charge detection node 114 to which source follower (SF) transistor 103 is connected. The drain terminal of source follower transistor 103 is connected to Vdd column bias line 1.09 and the source terminal of source follower transistor 103 is connected to column output signal (readout) line 108 through addressing transistor 104. Charge detection node 114 is reset by reset transistor 105, which is also connected to Vdd column bias line 109. Charge from photodiodes 101 and 102 is transferred onto floating diffusion node 114 by charge transfer transistors 106 and 107, respectively. Reset transistor gate 105 is controlled by reset control signals received over row control line 110, charge transfer transistor gates 106 and 107 are controlled by transfer control signals received over row lines 112 and 113, respectively, and addressing transistor gate 104 is controlled by row select control signals received over row addressing line 111. As shown in FIG. 1, it is clear that each pair of pixel photodiodes must be coupled to it total of five transistors (i.e., 2.5 transistors per photodiode).
When the pixel size is reduced, it is desirable to minimize the number of transistors and the number of metal wire interconnections per pixel. This is typically accomplished by eliminating row addressing transistor 104. The operation of a pixel without the row addressing transistor is described, for example, in Hynecek (U.S. Pat. No. 8,558,931), incorporated herein by reference. When pixel components such as the source follower transistor are reduced in size, random telegraph signal (RTS) noise becomes more dominant and noticeable in the final image.
It would therefore be desirable to be able to provide improved image sensor pixels.